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MSM63182 1/33 ? semiconductor general description the MSM63182 is a cmos 4-bit microcontroller to support dot matrix lcds. the MSM63182 has an oki-original nx-4/250 cpu core. the minimum instruction execution time is 1 m s (@ 2 mhz system clock). the MSM63182 contains 4k-word program ememory, data memory (256 nibbles 3.5 banks), two 4-bit input ports, four 4-bit output ports, three 4-bit input-output ports, lcd drivers for a maximum of 512 segments, and a buzzer output port. the cmos structure has realized a low power consumption. applications games, pagers, data banks, etc. features ? rich instruction set instructions : 439 transfer, rotate, increment/decrement, arithmetic operations, comparison, logic operations, mask operations, bit operations, rom table reference, external memory transfer, stack operations, flag operations, branch, conditional branch, call/return, control. ? rich selection of addressing modes indirect addressing of four data memory types, with current bank register, extra bank register, hl register and xy register. data memory bank internal direct addressing mode. ? operating frequency two clocks per machine cycle, with most instructions executed in one machine cycle. minimum instruction execution time : 61 m s (@ 32.768 khz system clock) :1 m s (@ 2 mhz system clock) low-speed clock : 32.768 khz crystal oscillator high-speed clock : 2 mhz (max.) rc or ceramic oscillator selectable ? program memory space : 4k words basic instruction length : 16 bits/1 word ? data memory space : 256 nibbles x 3.5 banks (1bank for sfr,1bank for display register, 1.5 banks for data ram ) ? semiconductor MSM63182 operatable at 0.9v and built-in 512-dot lcd driver 4-bit microcontroller preliminary e2e0024-27-y3 this version: jan. 1998 previous version: mar. 1996
MSM63182 2/33 ? semiconductor ? external data memory space : 64 kbytes (expandable) ? stack area call stack : 14 bits x 8 levels register stack : 16 bits x 16 levels ? i/o ports : total 36 input port : 2 ports x 4 bits selectable as input with pull-up resistor/input with pull-down resistor/high-impedance input output port : 4 ports x 4 bits selectable as p-channel open drain output/n-channel open drain output/cmos output input-output port : 3 ports x 4 bits selectable as input with pull-up resistor/input with pull-down resistor/high-impedance input selectable as p-channel open drain output/n-channel open drain output/cmos output can be interfaced with power supplies of external peripherals ? buzzer output : one ? lcd driver : total 48 common driver : 16 segment driver : 32 1/1 to 1/16 duty : 512 segments (32 x 16) max. 1/4 or 1/5 bias selectable as all-on mode/all-off mode/power down mode/normal display mode, adjustable contrast ? reset function reset through reset pin power-on reset reset to low-speed oscillation halt ? battery check low-voltage supply check ? backup voltage doubler circuit operation (v ddh level generator) ? counter time-base counter : (15-bit) x 1 1 hz, 2 hz, 4 hz, 8 hz, 16 hz, 32 hz, 64 hz, 128 hz output
MSM63182 3/33 ? semiconductor ? interrupt external interrupt : 2 internal interrupt : 6 (watchdog timer x 1, time base x 4, 100 hz timer x 1) ? chip size : 4.92 x 4.44 (mm 2 ) ? supply voltage with no backup : 0.9 v to 2.7 v (maximum operating frequency 300 khz) 1.2 v to 2.7 v (maximum operating frequency 500 khz) 1.5 v to 2.7 v (maximum operating frequency 1 mhz) with backup : 1.8 v to 5.5 v (maximum operating frequency 500 khz) 2.2 v to 5.5 v (maximum operating frequency 1 mhz) 2.7 v to 5.5 v (maximum operating frequency 2 mhz) ? package: 128-pin plastic qfp (qfp128-p-1420-0.50-k) (product name : MSM63182-xxxgs-k) chip (product name : MSM63182-xxx) xxx indicates the code number. program development environment ? cross assembler: asm63kn ? structured assembler: sasm63k ? tool: ease63180 ? debbuger: sid63k ? loader: setice
MSM63182 4/33 ? semiconductor block diagram timing cont. cbr ebr hl xy ra a pc cgz mie ir instruction decoder stack cal. s : 8 levels reg. s : 16 levels sp rsp alu bus cont. rom 4 k 16 bits extmem d0 to 7* a0 to 15* rd * wr * bd bdb buzzer i/o port p80 to 3 p90 to 3 pa0 to 3 v ddi int 1 ram 384 4 bits int182 int int int 4 1 1 tbc bld 100 hztc wdt int 1 input port output port p0.0 to p0.3 p1.0 to p1.3 p4.0 to p4.3 p5.0 to p5.3 p6.0 to p6.3 p7.0 to p7.3 lcd & dspr v ss segg0-31 com1-16 v ddl c2 c1 v dd1 v dd2 v dd3 v dd4 v dd5 bias back up cb2 cb1 v dd v ddh osc osc1 osc0 xt1 xt0 tst1 tst2 tst reset rst * shows secondary functions. nx-4/250
MSM63182 5/33 ? semiconductor pin configuration (top view) 58 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 nc nc nc seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 xt0 xt1 reset osc0 osc1 v ddl v dd cb2 cb1 v ddh c2 c1 v dd5 v dd4 v dd3 v dd2 v dd1 v ss nc nc 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 nc nc nc p7.3/a15 p6.0/a8 p6.1/a9 p6.2/a10 p6.3/a11 p1.0/int5 p1.1/int5 p1.2/int5 p1.3/int5 pa.0/d4 pa.1/d5 pa.2/d6 pa.3/d7 p9.0/d0 p9.1/d1 p9.2/d2 p9.3/d3 p8.0/ rd p8.1/ we p8.2 p8.3/int4 p0.0/int5 p0.1/int5 p0.2/int5 p0.3/int5 p4.0/a0 p4.1/a1 bdb v ddi com1 com2 com3 com4 com5 com6 com7 com8 com9 com10 com11 com12 com13 com14 com15 com16 nc nc 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 31 32 33 34 35 36 37 38 seg4 seg3 seg2 seg1 seg0 nc nc nc 72 71 70 69 68 67 66 65 p4.2/a2 p4.3/a3 p5.0/a4 p5.1/a5 p5.2/a6 nc nc nc 64 63 62 61 60 49 nc nc nc p5.3/a7 tst1 tst2 nc nc p7.2/a14 p7.1/a13 p7.0/a12 bd 103 104 105 106 107 108 nc: no-connection pin 128-pin plastic qfp
MSM63182 6/33 ? semiconductor pin descriptions the basic functions of each pin on the MSM63182 are described in table 1, and the secondary functions in table 2. table 1-(a) pin descriptions (basic functions) function symbol pin type description v dd 52 positive power supply v ss 41 negative power supply v dd1 42 v dd2 43 v dd3 44 lcd bias output v dd4 45 v dd5 46 power supply c1 47 lcd bias output capacitor connection pin c2 48 v ddi 110 external equipment interface supply (for ports p0 to pa) v ddh 49 step-up voltate supply cb1 50 step-up voltage generation capacitor and connection cb2 51 xt0 58 i low-speed clock oscillator pin: 32.768 khz crystal oscillator and capacitor (c g ) connection xt1 57 o oscillator osc0 55 i 54 high-speed clock oscillator pin: connect ceramic oscillator and capacitor (c l1 , c l2 ) or external oscillation resistance (r os ). osc1 60 o test pin: test pin: pulled down to v ss internally. test 59 reset input pin: when this pin drops from high to low impedance, internal reset occurs and execution begins from address 0000h. pulled down to v ss internally. reset reset 56 i bd 108 o buzzer output pin: output in normal or reversed phase. buzzer bdb 109 o tst1 i tst2 i v ddl 53 positive power supply for internal logic (internally generated voltage)
MSM63182 7/33 ? semiconductor table 1-(b) pin descriptions (basic functions) function symbol pin type description p0.0/int5 78 4-bit input port: selectable for pull-up resistor, pull-down resistor or high-impedance input for each bit. external interrupt is allocated as secondary functions. p0.1/int5 77 i p0.2/int5 76 p0.3/int5 75 p1.0/int5 94 i 4-bit input port: selectable for pull-up resistor, pull-down resistor or high-impedance input for each bit. external interrupt is allocated as secondary functions. p1.1/int5 93 p1.2/int5 92 p1.3/int5 91 p4.0/a0 74 ports p4.1/a1 73 o 72 p4.2/a2 71 4-bit output port: selectable for p-channel open drain output, n-channel open drain output or cmos output for each bit. external memory access address bus allocated as secondary functions. p4.3/a3 p5.0/a4 70 p5.1/a5 69 o 68 p5.2/a6 61 4-bit output port: selectable for p-channel open drain output, n-channel open drain output or cmos output for each bit. external memory access address bus allocated as secondary functions. p5.3/a7 p6.0/a8 98 p6.1/a9 97 o 96 p6.2/a10 95 4-bit output port: selectable for p-channel open drain output, n-channel open drain output or cmos output for each bit. external memory access address bus allocated as secondary functions. p6.3/a11 p7.0/a12 107 p7.1/a13 106 o 105 p7.2/a14 99 4-bit output port: selectable for p-channel open drain output, n-channel open drain output or cmos output for each bit. external memory access address bus allocated as secondary functions. p7.3/a15
MSM63182 8/33 ? semiconductor table 1-(c) pin descriptions (basic functions) function symbol pin type description p8.0/ rd 82 4-bit input-output port: for input mode, selectable for pull-up resistance, pull-down resistance or high-impedance input for each bit. for output mode, selectable for p-channel open drain output, n-channel open drain output or cmos output for each bit. external memory access read/write signal and external interrupt allocated as secondary functions. p8.1/ wr 81 p8.2 80 p8.3/int4 79 i/o port p9.0/d0 86 4-bit input-output port: for input mode, selectable for pull-up resistance, pull-down resistance or high-impedance input for each bit. for output mode, selectable for p-channel open drain output, n-channel open drain output or cmos output for each bit. external memory access data bus signal allocated as secondary functions. p9.1/d1 85 p9.2/d2 84 p9.3/d3 83 i/o pa.0/d4 90 4-bit input-output port: for input mode, selectable for pull-up resistance, pull-down resistance or high-impedance input for each bit. for output mode, selectable for p-channel open drain output, n-channel open drain output or cmos output for each bit. external memory accrss data bus signal allocated as secondary functions. pa.1/d5 89 pa.2/d6 88 pa.3/d7 87 i/o
MSM63182 9/33 ? semiconductor table 1-(d) pin descriptions (basic functions) funciton symbol pin type description com1 111 lcd common signal output pins com2 112 o com3 113 com4 114 com5 115 com6 116 com7 117 lcd com8 118 com9 119 com10 120 com11 121 com12 122 com13 123 com14 124 com15 125 com16 126 seg0 35 seg1 34 seg2 33 seg3 32 seg4 31 seg5 30 seg6 29 seg7 28 seg8 27 seg9 26 seg10 25 seg11 24 seg12 23 seg13 22 seg14 21 seg15 20 seg16 19 seg17 18 seg18 17 seg19 16 seg20 15 seg21 14 seg22 13 seg23 12 seg24 11 seg25 10 seg26 9 lcd segment signal output pins o
MSM63182 10/33 ? semiconductor table 1-(e) pin descriptions (basic functions) function symbol pin type description seg27 8 lcd segment signal output pins seg28 7 o seg29 6 seg30 5 seg31 4 lcd
MSM63182 11/33 ? semiconductor table 2-(a) pin descriptions (secondary functions) function symbol pin type description p0.0/int5 78 p0.0 to p0.3, p1.0 to p1.3 secondary functions: external interrupt input pin. interrupt to level change supported. each bit may be enabled/disabled with port 0 interrupt enable register (p0ie) and port 1 interrupt enable register (p1ie). p0.1/int5 77 p0.2/int5 76 p0.3/int5 75 p1.0/int5 94 p1.1/int5 93 p1.2/int5 92 external interrupt p1.3/int5 91 p8.3/int4 79 p8.3 secondary function: external interrupt input pin. interrupt to level change supported. i i
MSM63182 12/33 ? semiconductor table 2-(b) pin descriptions (secondary functions) function symbol pin type description p4.0/a0 74 p4, p5, p6, p7 secondary functions: address bus signals for external memory access p4.1/a1 73 i/o p4.2/a2 72 p4.3/a3 71 p5.0/a4 70 p5.1/a5 69 p5.2/a6 68 external memory p5.3/a7 61 p6.0/a8 98 p6.1/a9 97 p6.2/a10 96 p6.3/a11 95 p7.0/a12 107 p7.1/a13 106 p7.2/a14 105 p7.3/a15 99 p9.0/d0 86 p9.1/d1 85 p9.2/d2 84 p9.3/d3 83 pa.0/d4 90 pa.1/d5 89 pa.2/d6 88 pa.3/d7 87 p8.0/ rd 82 p8.1/ wr 81 o p9, pa secondary functions: data bus signals for external memory access o p8.0 secondary function: read signal (negative logic) for external memory access. o p8.1 secondary function: write signal (negative logic) for external memory access.
MSM63182 13/33 ? semiconductor memory maps program memory space the program memory space is used for program data. it has a 16-bit data length, allocated from addresses 0h to 0fdfh. rom table data, as well as the program data, can be stored in the program memory space. the program memory space configuration is indicated in fig. 3. 16 bits program data or rom table data 40 words 4064 words interrupt vector area 0000h 0010h 0037h 0fffh instruction execution start address 0fe0h 0fdfh test data area 32 words fig. 3 program memory space configuration address 0000h is the instruction execution start address used after system reset. the interrupt area from 0010h to 0037h includes the interrupt processing routine start address when an send interrupt is generated. rom table data is transferred to data memory by the rom table reference instruction. the 32 words from 0fe0h to 0fffh are a test data area and cannot be used as a program memory area.
MSM63182 14/33 ? semiconductor data memory space as indicated in fig. 4, the data memory consists of 3.5 banks, with each bank unit having 256 nibbles in size. bank 0 is assigned to sfr space, bank 1 is assigned to lcd display registers, and banks 2 to 3.5 (384 nibbles) are assigned to data ram. data ram area (384 nibbles) bank15 bank14 bank13 bank12 bank11 bank10 bank9 bank8 bank7 bank6 bank5 bank4 bank3 bank2 bank1 bank0 000h 100h 0ffh 200h 1ffh 300h 2ffh 400h 3ffh 500h 4ffh 600h 5ffh 700h 6ffh 800h 7ffh 900h 8ffh 0a00h 9ffh 0b00h 0affh 0c00h 0bffh 0d00h 0cffh 0e00h 0dffh 0f00h 0effh 0fffh sfr area (256 nibbles) lcd display registers (128 nibbles) ebr cbr h l x y sp rsp ra3 ra2 ra1 ra0 other sfr area 4 bits 4 bits 0f1h 0f2h 0f3h 0f4h 0f5h 0f6h 0f7h 0f8h 0f9h 0fah 0fbh 0fch 0fdh 0feh 0ffh 000h 100h 1ffh mief 37fh indicates an unused area. 17fh (note) fig. 4 data memory space configuration
MSM63182 15/33 ? semiconductor external memory space the external memory space has an 8-bit data length, allocated from address 0 to address 0ffffh. it is configured as indicated in fig. 5. data 0000h 0ffffh 65,536 bytes 8 bits fig. 5 external memory space configuration
MSM63182 ? semiconductor 16/33 absolute maximum ratings (when power supply is backed up or not) parameter symbol condition rating unit C0.3 to +1.6 supply voltage 1 ta = 25c v dd1 v C0.3 to +2.9 supply voltage 2 ta = 25c v dd2 v C0.3 to +4.2 supply voltage 3 ta = 25c v dd3 v C0.3 to +5.5 supply voltage 4 ta = 25c v dd4 v C0.3 to +6.8 supply voltage 5 ta = 25c v dd5 v C0.3 to +3.0 supply voltage 6 when backed up, ta = 25c v dd v C0.3 to +6.0 supply voltage 7 ta = 25c v ddi v C0.3 to +6.0 supply voltage 8 ta = 25c v ddh v C0.3 to v dd +0.3 input voltage 1 v dd input, ta=25c v in1 v C0.3 to v ddi +0.3 input voltage 2 v ddi input, ta=25c v in2 v C0.3 to v dd1 +0.3 output voltage 1 v dd1 output, ta=25c v out1 v C0.3 to v dd2 +0.3 output voltage 2 v dd2 output, ta=25c v out2 v C0.3 to v dd3 +0.3 output voltage 3 v dd3 output, ta=25c v out3 v C0.3 to v dd4 +0.3 output voltage 4 v dd4 output, ta=25c v out4 v C0.3 to v dd5 +0.3 output voltage 5 v dd5 output, ta=25c v out5 v C0.3 to v dd +0.3 output voltage 6 v dd output, ta=25c v out6 v C0.3 to v ddi +0.3 output voltage 7 v ddi output, ta=25c v out7 v C0.3 to v ddh +0.3 output voltage 8 v ddh output, ta=25c v out8 v C55 to +125 storage temperature t stg c (v ss =0 v) C0.3 to +6.0 supply voltage 9 ta = 25c v ddl v C0.3 to +6.0 when not backed up, ta = 25c v
MSM63182 ? semiconductor 17/33 recommended operating conditions (when power supply is backed up) parameter symbol condition range unit C20 to +70 operating temperature t op c 0.9 to 2.7 operating voltage v dd v 0.9 to 5.5 v ddi v 30 to 35 crystal osc frequency f xt khz 300k max. ceramic oscillation frequency v dd =0.9 to 2.7 v f cm 200 to 300 rc oscillator external resistance v dd =0.9 to 2.7 v r os 500k max. v dd =1.2 to 2.7 v hz 1m max. v dd =1.5 to 2.7 v 100 to 300 v dd =1.2 to 2.7 v k w 50 to 300 v dd =1.5 to 2.7 v recommended operating conditions (when power supply is backed up) parameter symbol condition range unit C20 to +70 operating temperature t op c 1.8 to 5.5 operating voltage v dd v 1.8 to 5.5 v ddi v 30 to 35 crystal osc frequency f xt khz 500k max. ceramic oscillation frequency v dd =1.8 to 5.5 v f cm 100 to 300 rc oscillator external resistance v dd =1.8 to 5.5 v r os 1m max. v dd =2.2 to 5.5 v 2m max. v dd =2.7 to 5.5 v hz 50 to 300 v dd =2.2 to 5.5 v k w 30 to 300 v dd =2.7 to 5.5 v
MSM63182 ? semiconductor 18/33 electrical characteristics dc characteristics (when power supply is backed up or not) (v dd =v ddi =3.0 v, v ss =0 v, ta=C20 to +70 c unless otherwise specified) parameter symbol condition mea- suring circuit unit typ.+0.2 1/2*v dd2 typ.C0.2 v dd1 voltage max. typ. min. v dd1 v vr+0.2 vr vrC0.2 v dd2 voltage v dd2 v typ.+0.3 3/2*v dd2 typ.C0.3 v dd3 voltage v dd3 v typ.+0.4 2*v dd2 typ.C0.4 v dd4 voltage v dd4 v typ.+0.5 5/2*v dd2 typ.C0.5 v dd5 voltage v dd5 v 0.9 xtosc oscillation start voltage v sta oscillation starts in 5 seconds. v 0.85 xtosc oscillation hold voltage v hold with back up v 1000 0.1 xtosc stop detect time t stop ms 30 10 xtosc external capacitance c g pf 20 15 12 xtosc internal capacitance c d pf 16 12 8 rcosc internal capacitance c os pf 30 ceramic oscillation external capacitance cl0, 1 ceramic oscillation 1 mhz, 2 mhz pf 0.4 0 por voltage v por1 v dd =1.5 v v 1.5 1.2 non-por voltage v por2 v dd =1.5 v v 1 3.0 2.0 v 0.7 0 v 1.7 with no back up v 2.0 1.5 1.0 v ddl voltage v ddl high-speed clock oscillaiton stops v 5.5 1.8 high-speed clock oscillation v v ddh 2.7 2.0 v ddh voltage (with back up) v dd =1.5 v high-speed clock oscillation ceramic oscillation, 1 mhz ch, cb12=1 m f v v dd =1.5 v high-speed clock oscillaiton stops ch, cb12=1 m f 3.0 2.8 v notes: 1. "vr" changes in the range from 1.8 v to 2.4 v according to the value of display contrast transistor (dspcnt). 2. "xtosc" indicates a 32.768 khz crystal oscillation circuit. 3. t stop indicates that the system is reset if xtosc is inoperative over the value of t stop . 4. "por" denotes power on reset. 5. "v por1 " indicates that por occurs when v dd falls from 3.0 v (1.5 v) to v por1 and again rises up to 3.0 v (1.5 v). 6. v por2 indicates that por does not occur when v dd falls from 3.0 v (1.5 v) to v por2 and again rises up to 3.0 v (1.5 v).
MSM63182 ? semiconductor 19/33 dc characteristics (when power supply is backed up) (v dd =v ddi =1.5 v, v ss =0 v, ta=C20 to +70 c unless otherwise specified) parameter symbol condition mea- suring circuit (1/3) unit max. typ. min. 35 6 current consumpiton 1 i dd1 cpu is in halt state. (high-speed clock oscillation stops) m a 30 4.6 current consumption 2 i dd2 cpu is in halt state. lcd is in power down mode. (high frequency clock oscillation stops) m a 40 17.0 current consumpiton 3 i dd3 cpu is in operating state. (high-speed clock oscillation stops) m a 700 550 current consumpiton 4 i dd4 cpu is in operating at high-speed oscillaiton (rc oscillation, r os =51 k w ) m a 700 600 current consumpiton 5 i dd5 cpu is in operating at high-speed oscillaiton (ceramic oscillation 1 mhz) m a 1
MSM63182 ? semiconductor 20/33 dc characteristics (when power supply is backed up) (v dd =v ddi =v ddl =1.5 v, v ss =0 v, v dd1 =1.1 v, v dd2 =2.2 v, v dd3 =3.3 v, v dd4 =4.4 v, v dd5 =5.5 v, v ddh =3 v, ta=C20 to +70 c unless otherwise specified) parameter symbol condition mea- suring circuit (2/3) unit C0.4 C1.2 C2.0 output current 1 (p4.0 to p4.3) (p5.0 to p5.3) (p6.0 to p6.3) max. typ. min. i oh1 v oh1 =v ddi C0.5 v ma 2.0 1.2 0.4 i ol1 v ol1 =0.5 v ma C2 C4 C8 i oh1s v ddi =5 v, v oh1s =v ddi C0.5 v ma 8 4 2 i ol1s v ddi =5 v, v ol1s =0.5 v ma (p9.0 to p9.3) (pa.0 to pa.3) C0.5 C1.3 C2.5 i oh2 v oh2 =v dd C0.7 v ma output current 2 (bd, bdb) 2.5 1.3 0.5 i ol2 v ol2 =0.7 v ma C4 i oh3 v dd3 =v dd5 C0.2 v(v dd5 level) m a 4 i ohm3 vohm3=v dd4 +0.2 v(v dd4 level) m a C4 i ohm3s vohm3s=v dd4 C0.2 v(v dd4 level) m a 4 i omh3 vomh3=v dd3 +0.2 v(v dd3 level) m a C4 i omh3s vomh3s=v dd3 C0.2 v(v dd3 level) m a 4 i oml3 voml3=v dd2 +0.2 v(v dd2 level) m a C4 i oml3s voml3s=v dd2 C0.2 v(v dd2 level) m a 4 i olm3 volm3=v dd1 +0.2 v(v dd1 level) m a C4 i olm3s volm3s=v dd1 C0.2 v(v dd1 level) m a 4 i ol3 v ol3 =v ss +0.2 v(v ss level) m a C0.75 C1.5 C2.5 i oh4r v oh4r =v ddh C0.5 v(rc osc mode) ma output current 3 (seg0 to seg31) (com1 to com16) 2.5 1.5 0.75 i ol4r v ol4r =0.5 v(rc osc mode) ma C50 C100 C200 i oh4c v oh4c =v ddh C0.5 v(ceramic osc mode) m a 200 100 50 i ol4c v ol4c =0.5 v(ceramic osc mode) m a output current 4 (osc1) output leakage (p4.0 to p4.3) (p5.0 to p5.3) (p6.0 to p6.3) (pa.0 to pa.3) 0.3 i ooh v oh =v ddi m a C0.3 i ool v ol =v ss m a 2
MSM63182 ? semiconductor 21/33 dc characteristics (when power supply is backed up) (v dd =v ddi =v ddl =1.5 v, v ss =0 v, v dd1 =1.1 v, v dd2 =2.2 v, v dd3 =3.3 v, v dd4 =4.4 v, v dd5 =5.5 v, v ddh =3 v, ta=C20 to +70 c unless otherwise specified) parameter symbol condition mea- suring circuit (3/3) unit 30 10 2 input current 1 (p0.0-p0.3) (p1.0-p1.3) (p8.0-p8.3) (p9.0-p9.3) max. typ. min. i ih1 v ih1 =v ddi (pulldown) m a 3 C2 C10 C30 i il1 v il1 =v ss (pullup) m a 600 250 70 i ih1s v ih1 =v ddi =5 v(pulldown) m a C70 C250 C600 i il1s v il1 =0 v, v ddi =5 v(pullup) m a 1 0 i ih1z v ih1 =v ddi (high impedance) m a 0 C1 i il1z v il1 =v ss (high impedance) m a C30 C110 C200 i il2 v il2 =v ss (pullup) m a 1 0 i ih2r v ih2 =v ddh (rc oscillation) m a 0 C1 i il2r v il2 =v ss (rc oscillation) m a 1.0 0.5 0.1 i ih2c v ih2 =v ddh (ceramic oscillation) m a C0.1 C0.5 C1 i il2c v il2 =v ss (ceramic oscillation) m a 80 50 10 i ih3 v ih3 =v dd m a 0 C1 i il3 v il3 =v ss m a 300 150 50 i ih4 v ih4 =v dd m a 0 C1 i il4 v il4 =v ss m a 1.5 1.2 v ih1 v 0.3 0 v il1 v 5 4 v ih1s v ddi =5 v v 1 0 v il1s v ddi =5 v v 3.0 2.4 v ih2 v 0.6 0 v il2 v 1.5 1.35 v ih3 v 0.15 0 v il3 v (pa.0-pa.3) input current 2 (osc0) input current 3 (reset) input current 4 (tst1, tst2) input voltage 1 (p0.0-p0.3) (p1.0-p1.3) (p8.0-p8.3) (p9.0-p9.3) input voltage 2 (osc0) (pa.0-pa.3) input voltage 3 (reset, tst1, tst2) hysteresis width 1 (p0.0-p0.3) (p1.0-p1.3) (p8.0-p8.3) (pa.0-pa.3) 0.3 0.1 0.05 d vt1 v 1.5 1.0 0.25 d vt1s v ddi =5 v v hysteresis width 2 (reset, tst1, tst2) 0.3 0.1 0.05 d vt2 v input pin capacitance (p0.0-p0.3) (p1.0-p1.3) (p8.0-p8.3) (p9.0-p9.3) (pa.0-pa.3) 5 c in pf 1 4
MSM63182 ? semiconductor 22/33 measuring circuit 1 measuring circuit 2 v ss a v ih v il *2 v dd v ddi v dd1 v dd2 v dd3 v dd4 v dd5 v ddh input output *3 *2 input logic to determine a specified state. *3 to be repeated for the specified output pin. v ddl c b12 cb1 cb2 c 12 c1 c2 osc0 q osc1 w *1 v ss a v dd v ddi v dd1 v c a v dd2 v c b v dd3 v c c v dd4 v c d v dd5 v c e v ddh v c h xt0 xt1 c g c a , c b , c c , c d , c e , c l , c 12 c b12 , c h c g c l0 c l1 ceramic oscillator :0.1 m f :1 m f :15 pf :30 pf :30 pf :csb1000j (1 mhz) (murata-make) c l0 c l1 q w q w *1 rc oscillator r os ceramic oscillation ceramic oscillator v ddl v c l
MSM63182 ? semiconductor 23/33 measuring circuit 3 v ss v dd v ddi v dd1 v dd2 v dd3 v dd4 v dd5 v ddh input output a *4 v ddl measuring circuit 4 v ss v ih v il *4 v dd v ddi v dd1 v dd2 v dd3 v dd4 v dd5 v ddh input output *4 to be repeated for the specified input pin. waveform probing v ddl
MSM63182 ? semiconductor 24/33 dc characteristics (when power supply is not backed up) (v dd =v ddi =v ddh =3 v, v ss =0 v, ta=C20 to +70 c unless otherwise specified) parameter symbol condition mea- suring circuit (1/3) unit max. typ. min. 18 2.7 current consumpiton 1 i dd1 cpu in halt state (high-speed clock oscillation stops) m a 15 2.0 current consumption 2 i dd2 cpu in halt state lcd in power down mode (high-speed clock oscillation stops) m a 20 8.0 current consumpiton 3 i dd3 cpu in operating state (high-speed clock oscillation stops) m a 500 380 current consumpiton 4 i dd4 cpu in operaton state at high-speed oscillation (rc oscillation, r os =51 k w ) m a 800 700 current consumpiton 5 i dd5 cpu in operation state at high-speed oscillation (ceramic oscillation 2 mhz) m a 1
MSM63182 ? semiconductor 25/33 dc characteristics (when power supply is not backed up) (v dd =v ddi =v ddh =3 v, v ss =0 v, v dd1 =1.1 v, v dd2 =2.2 v, v dd3 =3.3 v, v dd4 =4.4 v, v dd5 =5.5 v, ta=C20 to +70 c unless otherwise specified) parameter symbol condition mea- suring circuit (2/3) unit C1.0 C3.0 C5.0 output current 1 (p4.0 to p4.3) (p5.0 to p5.3) (p6.0 to p6.3) max. typ. min. i oh1 v oh1 =v ddi C0.5 v ma 5.0 3.0 1.0 i ol1 v ol1 =0.5 v ma C2 C4 C8 i oh1s v ddi =5 v, v oh1s =v ddi C0.5 v ma 8 4 2 i ol1s v ddi =5 v, v ol1s =0.5 v ma (p9.0 to p9.3) (pa.0 to pa.3) C2 C4 C6 i oh2 v oh2 =v dd C0.7 v ma output current 2 (bd, bdb) 6 4 2 i ol2 v ol2 =0.7 v ma C4 i oh3 v dd3 =v dd5 C0.2 v(v dd5 level) m a 4 i ohm3 v ohm3 =v dd4 +0.2 v(v dd4 level) m a C4 i ohm3s v ohm3s =v dd4 C0.2 v(v dd4 level) m a 4 i omh3 v omh3 =v dd3 +0.2 v(v dd3 level) m a C4 i omh3s v omh3s =v dd3 C0.2 v(v dd3 level) m a 4 i oml3 v oml3 =v dd2 +0.2 v(v dd2 level) m a C4 i oml3s v oml3s =v dd2 C0.2 v(v dd2 level) m a 4 i olm3 v olm3 =v dd1 +0.2 v(v dd1 level) m a C4 i olm3s v olm3s =v dd1 C0.2 v(v dd1 level) m a 4 i ol3 v ol3 =v ss +0.2 v(v ss level) m a C0.75 C1.5 C2.5 i oh4r v oh4r =v ddh C0.5 v(rc osc mode) ma output current 3 (seg0 to seg31) (com1 to com16) 2.5 1.5 0.75 i ol4r v ol4r =0.5 v(rc osc mode) ma C60 C120 C240 i oh4c v oh4c =v ddh C0.5 v(ceramic osc mode) m a 240 120 60 i ol4c v ol4c =0.5 v(ceramic osc mode) m a output current 4 (osc1) output leakage (p4.0 to p4.3) (p5.0 to p5.3) (p6.0 to p6.3) (pa.0 to pa.3) 0.3 i ooh v oh =v ddi m a C0.3 i ool v ol =v ss m a 2
MSM63182 ? semiconductor 26/33 dc characteristics (when power supply is not backed up) (v dd =v ddi =v ddh =3 v, v ss =0 v, v dd1 =1.1 v, v dd2 =2.2 v, v dd3 =3.3 v, v dd4 =4.4 v, v dd5 =5.5 v, ta=C20 to +70 c unless otherwise specified) parameter symbol condition mea- suring circuit (3/3) unit 180 90 30 input current 1 (p0.0 to p0.3) (p1.0 to p1.3) (p8.0 to p8.3) (p9.0 to p9.3) max. typ. min. i ih1 v ih1 =v ddi (pulldown) m a 3 C30 C90 C180 i il1 v il1 =v ss (pullup) m a 600 250 70 i ih1s v ih1 =v ddi =5 v(pulldown) m a C70 C250 C600 i il1s v il1 =0 v, v ddi =5 v(pullup) m a 1 0 i ih1z v ih1 =v ddi (high impedance) m a 0 C1 i il1z v il1 =v ss (high impedance) m a C30 C110 C200 i il2 v il2 =v ss (pullup) m a 1 0 i ih2z v ih2 =v ddh (rc oscillation) m a 0 C1 i il2z v il2 =v ss (rc oscillation) m a 3 1.5 0.75 i ih2c v ih2 =v ddh (ceramic oscillation) m a C0.75 C1.5 C3 i il2c v il2 =v ss (ceramic oscillation) m a 600 350 150 i ih3 v ih3 =v dd m a 0 C1 i il3 v il3 =v ss m a 1.5 1.0 0.5 i ih4 v ih4 =v dd ma 0 C1 i il4 v il4 =v ss m a 3 2.4 v ih1 v 0.6 0 v il1 v 5 4 v ih1s v ddi =5 v v 1 0 v il1s v ddi =5 v v 3.0 2.4 v ih2 v 0.6 0 v il2 v 3.0 2.4 v ih3 v 0.6 0 v il3 v (pa.0 to pa.3) input current 2 (osc0) input current 3 (reset) input current 4 (tst1, tst2) input voltage 1 (p0.0 to p0.3) (p1.0 to p1.3) (p8.0 to p8.3) (p9.0 to p9.3) input voltage 2 (osc0) (pa.0 to pa.3) input voltage 3 (reset, tst1, tst2) hysteresis width 1 (p0.0 to p0.3) (p1.0 to p1.3) (p8.0 to p8.3) (pa.0 to pa.3) 1 0.5 0.2 d vt1 v 1.5 1.0 0.25 d vt1s v ddi =5 v v hysteresis width 2 (reset, tst1, tst2) 1.0 0.5 0.2 d vt2 v input pin capacitance (p0.0 to p0.3) (p1.0 to p1.3) (p8.0 to p8.3) (p9.0 to p9.3) (pa.0 to pa.3) 5 c in pf 1 4
MSM63182 ? semiconductor 27/33 cb1 cb2 c 12 c1 c2 osc0 q osc1 w *1 v ss a v dd v ddi v dd1 v c a v dd2 v c b v dd3 v c c v dd4 v c d v dd5 v c e v ddh xt0 xt1 c g c a , c b , c c , c d , c e , c l , c 12 c g c l0 c l1 ceramic oscillator :0.1 m f :15 pf :30 pf :30 pf :csa2.00mg (2 mhz) (murata-make) c l0 c l1 q w q w *1 rc oscillation r os ceramic oscillation (open) (open) ceramic oscillator v ddl v c l measuring circuit 1 v ss a v ih v il *2 v dd v ddi v dd1 v dd2 v dd3 v dd4 v dd5 v ddh input output *3 *2 input logic to determine a specified state. *3 to be repeated for the specified output pin. v ddl measuring circuit 2
MSM63182 ? semiconductor 28/33 measuring circuit 3 v ss v dd v ddi v dd1 v dd2 v dd3 v dd4 v dd5 v ddh input output a *4 v ddl measuring circuit 4 v ss v ih v il *4 v dd v ddi v dd1 v dd2 v dd3 v dd4 v dd5 v ddh input output *4 to be repeated for the specified input pin. waveform probing v ddl
MSM63182 ? semiconductor 29/33 ac characteristics (data transfer from/to external memory) (v dd =0.9 to 5.5 v, v ss =0 v, v ddi =5 v, ta=C20 to +70 c) (1) reading from external memory (a) when the cpu operates at 32.768 khz parameter symbol condition unit read cycle time max. typ. min. t rc m s 61 rd output delay time t oe m s 5 output enable time t oha m s 5 external memory output delay time t do m s 5 (b) when the cpu operates at 2 mhz (v dd =v ddh =2.7 to 5.5 v). parameter symbol condition unit 1 read cycle time max. typ. min. t rc m s rd output delay time t oe m s 100 output enable time t oha m s 100 external memory output delay time t do m s 150 movxb obj, xadr 16 s1 s2 s1 s2 s1 s2 movxb obj, [ra] t rc t oe t oha t do port setup value address output port setup value port setup value port setup value input data system clock p7 to p4 (a15 to a0) pa, p9 (d7 to d0) p8.0 ( rd ) v ddi v ss v ddi v ss v ddi v ss ("h" level=4 v, "l" level=1 v)
MSM63182 ? semiconductor 30/33 (2) writing to external memory (a) when the cpu operates at 32.768 khz parameter symbol condition unit write cycle time max. typ. min. t wc m s 61 address setup time t as m s 30.5 write time t w m s 15.3 write recovery time t wr m s 15.3 data setup time t ds m s 45.8 data hold time t dh m s 15.3 (b) when the cpu operates at 2 mhz (v dd =v ddh =2.7 to 5.5 v). parameter symbol condition unit 1 write cycle time max. typ. min. t wc m s 0.4 address setup time t as m s 0.2 write time t w m s 0.2 write recovery time t wr m s 0.7 data setup time t ds m s 0.2 data hold time t dh m s ("h" level=4 v, "l" level=1 v) movxb [ra], obj, or movxb xadr 16, obj s1 s2 s1 s2 s1 s2 t wc t as port setup value address output port setup value system clock p7 to p4 (a15 to a0) p8.1 ( wr ) port setup value output data port setup value pa, p9 (d7 to d0) t ds t dh t w t wr v ddi v ss v ddi v ss v ddi v ss
MSM63182 ? semiconductor 31/33 application circuits xt0 com1 to 16 xt1 v ddh v dd cb1 cb2 v dd5 v dd4 v dd3 v dd2 v dd1 c1 c2 reset tst1 tst2 bd bdb v ss seg0 to 31 osc0 osc1 r os p1.3 p1.2 p1.1 p1.0 p0.3 p0.2 p0.1 p0.0 p3.3 p3.2 p3.1 p3.0 p2.3 p2.2 p2.1 p2.0 cb12 cv c g c12 lcd 32.768 khz ch 1.5 v ce cd cc cb ca buzzer ?rc oscillation is selected as high-speed oscillation. ?ports are powered from external ram power source. ?cv is an ic power supply bypass capacitor. v ddi p4 to p7 p9 to pa p8.0 p8.1 sw matrix (8 8) v dd a15 to 0 d7 to 0 rd wr v ss external memory (64k 8bits) 5.0 v xtal v ddl cl application circuit example with power supply backup
MSM63182 ? semiconductor 32/33 application circuit example with no power supply backup xt0 com1 to 16 xt1 v ddh v dd v dd5 v dd4 v dd3 v dd2 v dd1 c1 c2 reset tst1 tst2 bd bdb v ss seg0 to 31 osc0 osc1 p1.3 p1.2 p1.1 p1.0 p0.3 p0.2 p0.1 p0.0 p3.3 p3.2 p3.1 p3.0 p2.3 p2.2 p2.1 p2.0 cv c g c12 lcd 32.768 khz v dd 3.0v ce cd cc cb ca buzzer ?ceramic oscillation is selected as high-speed oscillation. ?ports, external ram, and ic share their power supply. ?cv is an ic power supply bypass capacitor. v ddi p4 to p7 p9 to pa p8.0 p8.1 sw matrix (8 8) v dd a15 to 0 d7 to 0 rd wr v ss external memory (64k 8bits) v dd xtal c l0 c l1 ceramic oscillaitor cb1 cb2 v ddl cl
MSM63182 ? semiconductor 33/33 (unit : mm) package dimensions notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). qfp128-p-1420-0.50-k package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 1.19 typ. mirror finish

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